Abstract
The linearity of the transconductance stage is of major concern in the design of some analog circuits. In this paper, Volterra series expansion is used to compute the intermodulation distortion of high frequency CMOS transconductance stage with source degeneration resistor. The MOS model used in this paper includes short-channel effects and gate-source capacitance, gate-drain capacitance, and output resistance of the MOS transistor. Analytical results are compared with simulation results and the influences of circuit parameters on circuit linearity are discussed.
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