Abstract
A methodology and the supporting CAD (computer-aided design) tools are discussed for designing a digital system so that it can meet predefined testability requirements. The set of tools is called the Test Engineer's Assistant (TEA). The TEA system creates an environment in which the designer can perform performance assessment, functional design, and design for testability (DFT). TEA is developed to support automated DFT at the board and subsystem levels, to aid in an appropriate choice of BIT (built-in test) techniques at the board level that is supported at the subsystem and system levels, to indicate where to augment system function with predefined BIT modules to increase testability, and to assess the hardware costs of implementing DFT and BIT. >
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