Cache Timing Attack against RSA Based on D-Cache

Abstract

This thesis focuses on the vulnerabilities of the RSA cryptographic algorithm when it is not securely implemented. Simultaneous multithreading enables multiple execution threads to share the execution resources of a super scalar, the shared access to memory caches provides an easily used high bandwidth covert channel between threads, allowing that a malicious thread can monitor the execution of another thread. This paper targets at RSA cryptosystem implemented via Open SSL 0.9.7c, monitors the cryptographic thread by executing a spy thread, recording the timing characteristic during the RSA decryption when reading the Cache. The attacker can recovers the original key via analyzing these timing measurements. Finally, we provide some suggestions of how this attack could be mitigated or eliminated entirely.