Abstract
Abstract This paper introduces the design process of a high-efficiency power amplifier, which adopts the 0.25µm GaN HEMT technology and a two-stage amplifier structure. In order to control harmonics for the second time, the SHS topology was added to the final matching network. After obtaining the physical object, the chip was tested using a 10% duty cycle pulse, and the test results showed that the second harmonic suppression degree of MMIC in the 5-6GHz band exceeded -45dBc, the pout was higher than 15W, the gain was greater than 22dB, and the PAE ranged from 52% to 60%. In addition, the PA MMIC had a size of 3 × 1.3 mm2.
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