Buried triple-gate structures for advanced field-effect transistor devices

Abstract

One key element in the investigation of novel channel materials and device principles is the realization of an appropriate source–drain doping profile. The paper at hand describes the manufacturing of a buried triple-gate (BTG) structure, where three separately addressable gates are implemented to control the charge carrier density within source, drain, and the channel of a field-effect transistor. The BTG structure is optimized for the investigation of graphene, and a 30nm graphene nanoribbon is fabricated on top of the structure. Electrical measurements at 25K indicate the successful realization of p-n junctions and demonstrate band-to-band tunneling at the source–channel and channel–drain interfaces.