Built in Self Test for Programmable System on Chip’s Analog to Digital Converter

Abstract

In this paper the built in self test for analog to digital converter of programmable system on chip is implemented. The new approach for finding out static errors in ADC is based on time. This approach uses ramp signal and determines time difference between two successive samples, which in turn leads to finding out the static error like DNL, INL of the ADC. The proposed work uses PSoC devices which enable us to design a complete mixed signal system with few off chip components To test static parameter of ADC on chip components are used. Ramp signal is generated by using on chip IDAC of PSoC. The BIST circuit implemented here calculate DNL, INL based on timing i.e. a new approach to calculate DNL, INL is implemented and verified.