Building-up of system level ESD modeling: Impact of a decoupling capacitance on ESD propagation

Abstract

Résumé We present a methodology for precise measurements and simulations of ESD system level stress applied to a simple printed circuit board. The impact of an external decoupling capacitance on the ESD propagation paths into an Integrated Circuit (IC) is demonstrated. Resulting current and voltage waveforms are analyzed to highlight the interactions between IC and components (including package, PCB and ESD protections).