Abstract

This work has been done in order to study a new technology provided by X-FAB named xt018. It is an SOI (Silicon On Insulator) technology with a minimal gate length of 180 nm. Building blocks have been done to test the advantages and drawbacks of this technology compared to the one currently used (AMS SiGe 0.35 μm). These building blocks have been designed to fit in an existing experience housed by the CALICE collaboration: the read-out chip for the Electromagnetic CALorimeter (ECAL) of the foreseen International Linear Collider (ILC). Performances will be compared to those of the SKIROC2 chip designed by the OMEGA laboratory, trying to fit the same requirements. The chip is being manufactured and will be back for measurements in December, the displayed results are only simulation results and thus the conclusions concerning the performances of these building blocks are subject to change.

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