Abstract
We demonstrate that the highly resistive Si substrate in GaN-on-Si RF HEMTs does not act as an insulator, but instead behaves as a conductive ground plane for static operation and can cause significant back-gate-induced current collapse. Substrate ramp characterization of the buffer shows good agreement with device simulations and indicates that the current collapse is caused by charge-redistribution within the GaN layer. Potential solutions, which alter charge storage and leakage in the epitaxy to counter this effect, are then presented.
Highlights
G AN-ON-SI technology is on course for rapid adoption in HEMT-based RF power amplifiers, with good performance and reliability having been demonstrated [1]–[3]
The use of conductive Si substrates for GaN-on-Si power devices has allowed a substrate voltage ramp technique to be used to infer the location and dynamics of charge trapping in the epitaxy [9], with deep depletion in moderately doped Si only observed at high fields when significant leakage occurs through the epitaxy [10]
GaN-on-Si RF devices are normally fabricated on high-resistivity Si (HR-Si) substrates, with the expectation that the Si can be treated as an insulator and has minimal influence on electric field distribution in the epitaxy
Summary
G AN-ON-SI technology is on course for rapid adoption in HEMT-based RF power amplifiers, with good performance and reliability having been demonstrated [1]–[3]. Current collapse associated with reversible, slow negative charge trapping remains a concern for all GaN HEMTs. While the use of well-designed field plates and appropriate passivation strategies has reduced the effect of surface-induced current collapse [4]–[6], strategies to comprehend and minimize buffer-induced current collapse, especially given the different GaN epitaxial layer doping strategies (Fe, C, intrinsic defects) used to achieve high-resistivity RF buffers, remain an active research area [7], [8]. The use of conductive Si substrates for GaN-on-Si power devices has allowed a substrate voltage ramp technique to be used to infer the location and dynamics of charge trapping in the epitaxy [9], with deep depletion in moderately doped Si only observed at high fields when significant leakage occurs through the epitaxy [10].
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