Brownian Bridge Based Analysis and Modeling of DAC Linearity, an In-depth View

Abstract

This chapter analytically investigates the DAC static linearity with respect to the accuracy of the DAC unit elements. It continues the discussion of the broad error modeling framework of Chap. 5 by concentrating on the DAC unit current amplitude errors. The main novelty of the presented approach is in the application of the Brownian Bridge (BB) process to precisely describe the INL. This method analyzes the thermometer (unary) and binary DAC architectures and is the first to prove that their statistical INL properties are different. The INL of the thermometer DAC is represented as an one-dimensional BB process. For the binary case, the INL is represented as combinations of random variables, the increments of which coincide with a BB process. For both architectures, this chapter derives formulas for the INL main statistical properties, e.g. PDF, mean, deviation, and chip yield. These properties are compared with previous analytical attempts and conclusions are drawn. The results of this chapter fill a gap in the general understanding of the most quoted DAC specification—the INL. In particular, for a high volume chip production, the derived formulas will help engineers to choose the DAC architecture and the allowed mismatch of the DAC unit elements. This chapter is based on the original publication [23]. The detailed mathematical derivations of the presented results are published in [48].