Broadband suppression of phase-noise with cascaded phase-locked-loops for the generation of frequency ramps

Abstract

Abstract. The generation of analogue frequency ramps with non-fractional phase-locked-loops (PLL) is a cost effective way of linearising varactor controlled oscillators (VCO). In case that the VCO shows a high phase-noise level, a single non-fractional PLL is not able to suppress the phase-noise of the VCO sufficiently. The reason for this is the limited loopbandwidth of the PLL. In the field of precise measurements a high phase-noise level is mostly not tolerable. Examples of VCO-types with an extremely high phase noise level are integrated millimetre wave oscillators based on GaAs-HEMT technology. Both, a low quality factor of the resonator and a high flicker-noise corner frequency of the transistors are the main reason for the poor phase-noise behaviour. On the other hand this oscillator type allows a cost effective implementation of a millimetre-wave VCO. Therefore, a cascaded two-loop structure is presented that is able to linearise a VCO and additionally to reduce its phase-noise significantly.