Broadband InGaP/GaAs HBT Power Amplifier Integrated Circuit Using Cascode Structure and Optimized Shunt Inductor

Abstract

This article presents a broadband two-stage cascode power amplifier integrated circuit (PAIC) using a 2- $\mu \text{m}$ InGaP/GaAs heterojunction bipolar transistor process. Since higher supply voltage of cascode power amplifier (PA) results in lower impedance transformation ratio of the matching network due to lower current, cascode PAs generally have broader bandwidth than common-emitter (CE) PAs. However, bandwidth analysis for handset PAs with a single-section load matching network, including transistors output capacitance, revealed that cascode PAs had bandwidth similar to CE PAs. Through bandwidth analysis based on power and efficiency contours at the internal plane of the transistor, an optimized shunt inductor with a single-section load matching network was proposed in this article to increase the bandwidth of cascode PA. Performances of both cascode and CE PAs with and without the optimized shunt inductor were compared. A broadband two-stage cascode PAIC with a compensating shunt inductor and an L-section matching network was designed and implemented. The implemented PAIC exhibited an output power of at least 30.1 dBm at frequency band ranging from 1.55 to 2.65 GHz for continuous-wave excitation. Using a long-term evolution signal with a peak-to-average power ratio of 7.5 dB and a signal bandwidth of 10 MHz, a power gain of more than 23.7 dB, power-added efficiency of 30.9% to 38.4%, and average output power of 26.7 to 27.7 dBm were obtained at a given adjacent channel leakage power ratio of −30 dBc. A fractional bandwidth was calculated to be 54.3% based on measured results.