Breakdown Yield and Lifetime of Thin Gate Oxides in CMOS Processing

Abstract

The processing effects on thin gate oxide yield and lifetime were studied by using ramp voltage and time‐dependent dielectric breakdown (TDDB) measurements on minimally processed MOS capacitors and fully processed devices in a CMOS technology. Gate oxides grown in a wet ambient are considerably superior to those grown in a dry ambient interms of breakdown distribution, yield, and lifetime. In addition, the correlation between lifetime and applied electric field also suggests an advantage for using wet oxides rather than dry oxides for scaling down the thickness. Several processing modules in a CMOS technology on the gate oxide breakdown characteristics are examined. High temperature oxidation and drive or back‐side gettering processing prior to the gate oxidation steps improve the oxide yield. Reactive ion or plasma etching for the gate electrode definition reduces lifetime of approximately 10% of the devices compared to the wet‐etched control. However, the most significant influence on the gate oxide yield and lifetime occurs during the oxidation and polysilicon gate deposition processing steps. Fully processed CMOS devices show a large reduction in gate oxide yield and lifetime as compared to minimally processed capacitors. Additional processing for double level metallization further degrades the gate oxide. This result indicates the cumulative nature of processing induced damage. Breakdown characteristics are significantly degraded when electrons are injected from the polysilicon gate as opposed to injection from the silicon substrate for the fully processed devices. This polarity dependence can be explained by plasma processing induced trapped holes near the interface which also cause anomalous leakage currents with a negative gate bias.