Abstract

Ultra-wide bandgap semiconductor gallium oxide (Ga2O3) features a breakdown strength of 8 MV/cm and bulk mobility of up to 300 cm2V−1s−1, which is considered a promising candidate for next-generation power devices. However, its low thermal conductivity is reckoned to be a severe issue in the thermal management of high-power devices. The epitaxial integration of gallium oxide thin films on silicon carbide (SiC) substrates is a possible solution for tackling the cooling problems, yet premature breakdown at the Ga2O3/SiC interface would be introduced due to the relatively low breakdown strength of SiC (3.2 MV/cm). In this paper, the on-state properties as well as the breakdown characteristics of the Ga2O3-on-SiC metal-oxide-semiconductor field-effect transistor (MOSFET) were investigated by using the technology computer-aided design (TCAD) approach. Compared with the full-Ga2O3 MOSFET, the lattice temperature of the Ga2O3-on-SiC MOSFET was decreased by nearly 100 °C thanks to the high thermal conductivity of SiC. However, a breakdown voltage degradation of >40% was found in an unoptimized Ga2O3-on-SiC MOSFET. Furthermore, by optimizing the device structure, the breakdown voltage degradation of the Ga2O3-on-SiC MOSFET is significantly relieved. As a result, this work demonstrates the existence of premature breakdown in the Ga2O3-on-SiC MOSFET and provides feasible approaches to further enhance the performance of hetero-integrated Ga2O3 power devices.

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