Abstract
The implementation of inference (i.e., computing posterior probabilities) in Bayesian networks using a conventional computing paradigm turns out to be inefficient in terms of energy, time, and space, due to the substantial resources required by floating-point operations. A departure from conventional computing systems to make use of the high parallelism of Bayesian inference has attracted recent attention, particularly in the hardware implementation of Bayesian networks. These efforts lead to several implementations ranging from digital circuits, mixed-signal circuits, to analog circuits by leveraging new emerging nonvolatile devices. Several stochastic computing architectures using Bayesian stochastic variables have been proposed, from FPGA-like architectures to brain-inspired architectures such as crossbar arrays. This comprehensive review paper discusses different hardware implementations of Bayesian networks considering different devices, circuits, and architectures, as well as a more futuristic overview to solve existing hardware implementation problems.
Highlights
IntroductionBayesian inference (i.e., the computation of a posterior probability given a prior probability and new evidence; Jaynes, 2003) is one of the most crucial problems in artificial intelligence (AI), in areas as varied as statistical machine learning (Tipping, 2003; Theodoridis, 2015), causal discovery (Heckerman et al, 1999), automatic speech recognition (Zweig and Russell, 1998), spam filtering (Gómez Hidalgo et al, 2006), and clinical decision support systems (Sesen et al, 2013)
Bayesian inference is one of the most crucial problems in artificial intelligence (AI), in areas as varied as statistical machine learning (Tipping, 2003; Theodoridis, 2015), causal discovery (Heckerman et al, 1999), automatic speech recognition (Zweig and Russell, 1998), spam filtering (Gómez Hidalgo et al, 2006), and clinical decision support systems (Sesen et al, 2013)
The fin-shaped field effect transistor (FinFET) technology used in the Loihi architecture is a promising technology in terms of energy and speed over conventional CMOS technology (Bagheriye et al, 2016), while the use of emerging nonvolatile technologies attracts a lot of attention to developing ultra-low energy computing platforms for Spiking Neural Network (SNN)-based Bayesian inference systems
Summary
Bayesian inference (i.e., the computation of a posterior probability given a prior probability and new evidence; Jaynes, 2003) is one of the most crucial problems in artificial intelligence (AI), in areas as varied as statistical machine learning (Tipping, 2003; Theodoridis, 2015), causal discovery (Heckerman et al, 1999), automatic speech recognition (Zweig and Russell, 1998), spam filtering (Gómez Hidalgo et al, 2006), and clinical decision support systems (Sesen et al, 2013) It is a powerful method for fusing independent (possibly conflicting) data for decision-making in robotic, biological, and multi-sensorimotor systems (Bessière et al, 2008). Both the inference problem (Cooper, 1990) and the learning problem (Chickering, 1996) are NP-hard problems in general.
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