Abstract
Slow current transients in metal-oxide-semiconductor (MOS) capacitors have been observed and related to border traps (traps that are too slow to be classified as interface traps, and too fast to be classified as oxide traps). This paper describes border-trap related current transients induced by voltage stepping as a possible technique for both energy-level and time-response characterisation of the border traps. The voltage stepping measurements are compared to the standard linear voltage ramping technique.
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