Blueshell

Abstract

The rapid increase in FPGA logic capacity has enabled the prototyping of multiprocessor Network-on-Chip (NoC) architectures. However, the design space exploration of these complex architectures is highly time consuming with traditional methodologies for FPGA design. Our paper addresses the challenges of multiprocessor network design with the Blueshell framework for generating multiprocessor networks on chip (NoC) and a coupled Java software stack, Network-Chi. With Blueshell hardware is mconstructed from high-level components including processors and routers using concise Bluespec System Verilog. The Network-Chi software framework is also presented to enable programming the on-chip processors in a familiar Java style and without exposing the low-level systems programming to the application designer. We demonstrate that Blueshell systems with as many as 20 processors can be implemented on a modestly sized FPGA. Performance figures for a selection of distributed applications are also provided.