Block parallel processing of 2‐D digital signals

Abstract

AbstractA structure is presented for the processing of two‐dimensional digital signals, based on a block state‐space model. Specifically the proposed structure exhibits high inherent parallelism since the state‐space model is properly split into a number of parallel subfilters. A detailed analysis is done to achieve a balanced distribution of the necessary non‐trivial multiplications in the subfilters. The optimal block dimensions are determined in order to minimize the critical number of non‐trivial multiplications per output sample. Finally an estimation of the data throughput delay, based on the number of necessary multiplications and additions, is given for the proposed structure. It is shown that the data throughput delay, estimated in the case of optimal block dimensions, is increased almost linearly with the filter's order and is substantially reduced relative to that which has been estimated with the canonical state‐space model. Also the data throughput delay for suboptimal block dimensions are considered. The proposed model is ideally suited to computer use and VLSI implementation.