Abstract
An array processing chip for the BLITZEN massively parallel SIMD (single-instruction multiple-data-stream) computer has been developed. The chip includes 128 bit-serial processing elements (PEs) connected in a modified grid. Each PE contains a 16-function logic unit, a single-bit adder, a 32-bit, variable-length shift register, and 1 K of local RAM. The 1-mm CMOS design contains over 1.1 million transistors on a 11.0-mm by 11.7-mm die
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