Abstract
Bitstreams, square wave digital signals, enable flexible radar implementations in modern digital technology. By using bitstreams in place of analog sinusoidal waveforms, we can realize continuous-wave (CW), stepped-frequency CW, frequency-modulated CW, or even pseudo random noise-sequence and pulsed radars, all with a single bit of amplitude resolution. The building blocks are a programable waveform generator, a sweep threshold quantizer, digital delay, and a digital XOR gate as a mixer. This gives us a novel, almost fully digital (requiring only a comparator) system, as previously proposed and which is extended here. The flexibility of the transmitter allows for easy switching between waveforms and the bitstream signal can be processed with single-bit digital gates. Single-bit signals allows for exploration of novel continuous time non-clocked digital implementations to maximize speed and energy efficiency. Mixing frequencies with a digital XOR gate creates harmonics, which are explored for multiple solutions utilizing digital delay. Analytical as well as simulation results are presented. Initial measurements from a 90 nm CMOS chip is provided for the transmitter and the full system, proving the feasibility of a digital future in radar.
Highlights
Modern digital technology bring miniaturization, low-power consumption, substantial computational power, and integration of complex processing on a small piece of silicon
We present a post-layout simulation from a commercial low-power 90 nm complementary metal–oxide–semiconductor (CMOS) process, where the inputs are sinusoidal
We have shown the feasibility of implementing several classical frequency-modulated architectures, a pseudo noise correlation radar and a simple pulsed radar; all in single-bit CMOS implementation
Summary
Modern digital technology bring miniaturization, low-power consumption, substantial computational power, and integration of complex processing on a small piece of silicon (system-on-chip). Several short-range radar systems are reported [11,12,13] indicating a number of potential sensing applications provided a compact, low-power, and highperformance radar is available; preferably in low-cost standard technology. The proposed solution uses a programable waveform generator and a swept threshold receiver, the frequency modulated architectures (CW, SFCW, and FMCW) uses a single XOR gate as a mixer and the CW/SFCW system uses counters to obtain the desired averaged DC output. The receiver amplifies the backscattered signal and quantizes the signal to a bitstream by comparing it with a changeable threshold voltage Preliminary simulations and handling of harmonics was first published in [14]; this is an extended paper with analytical treatment and measurements from a prototype chip implementation
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