Bit stream compression used for FPGA using Golomb coding

Abstract

Bitstream compression is important in reconfigurable system design since it reduces the bit stream size and the memory requirement. It also improves the communication bandwidth and thereby decreases the reconfiguration time in FPGA. Existing research in this field has explored two directions: efficient compression with slow decompression or fast decompression at the cost of compression efficiency. There are two major challenges in bit stream compression. They are, compressing the bit stream as much as possible and efficiently decompressing the bit stream without affecting the reconfiguration time. The three major contributions of this project are:1) Smart placement of compressed bit streams that can significantly decrease the overhead of decompression engine, 2) Selection of profitable parameters for bit stream compression, 3) Efficient combination of bitmask-based compression and Golomb encoding of non-repetitive patterns. The decompression hardware for variable-length coding is capable of operating at the speed closest to the best known field-programmable gate array-based decoder for fixed-length coding.