Abstract
It is shown how two square arrays, each comprising square root N* square root N CORDIC (Coordinate Rotation Digital Computer) processing elements (PEs), can be used to carry out an efficient two-dimensional (2-D) implementation of the N-point discrete Fourier transform (DFT), with O( square root N) time-complexity, producing N DFT coefficients every square root N time-steps, with fully systolic operation. Generalization to a multidimensional (m-D) solution is also discussed. The CORDIC PE is implemented in bit-serial form, being thus extremely efficient, in terms of speed/area product, and possessing simple interconnects. These characteristics facilitate the mapping of potentially thousands of such units, and hence of entire medium/large DFT modules, onto a single chip, when implemented with very-large-scale-integration (VLSI) or wafer-scale-integration (WSI) technologies. >
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