Bit-Aware Fault-Tolerant Hybrid Retraining and Remapping Schemes for RRAM-Based Computing-in-Memory Systems

Abstract

Non-volatile computing-in-memory (nvCIM) has become one of the most efficient methods to deal with increasingly complicated neural networks compared to the traditional von Neumann architecture. However, due to the immature fabrication issues, the yield of resistive random access memory (RRAM) cells is limited, which causes the Stuck-At-Faults (SAFs) and decrease of network classification accuracy. In this brief, the bit-aware fault-tolerant hybrid retraining and remapping schemes are proposed to restore the network classification accuracy caused by SAFs. The low weight bits are retrained with the fault mask and the high weight bits are remapped with column swap and zero correction methods. For those bits whose values are still wrong after remapping, the fault index is used to record and calibrate. Experimental results show that the classification accuracy of MNIST, CIFAR-10, and CIFAR-100 is restored from 12.54% to 98.13%, from 10.29% to 90.60%, and from 0.94% to 74.30% with only 10.3% energy consumption and 5.88% area overhead, respectively.