Abstract
To detect delay faults in a digital circuit requires a test sequence applied at the nominal frequency of the circuit. Built-in self-test (BIST) is a technique that provides such testing possibilities at speed, without expensive test equipments. A BIST test pattern generator (TPG) design, targeting the detection of delay faults is proposed.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
