Bipolar transistors for low noise, low temperature electronics

Abstract

In silicon MOS technology, 1/ f noise increases as the device geometry shrinks, making MOS field effect transistors unacceptable for low noise, high density analog applications. While bipolar technology is available for such applications at room temperature, it was not practical until recently for cryogenic operation because of unacceptably low current gain at low temperatures. This paper reports the noise properties and conduction characteristics of bipolar transistors at cryogenic temperatures. These devices were fabricated with high density, polyemitter bipolar processing technology, and respectable current gains greater than 500 down to 40 K can be obtained. Noise measurements at low temperatures show that 1/ f noise is an order of magnitude smaller than in MOS devices of equal area. White noise also decreases at low temperatures due to a decrease in series resistances and an improvement in current gain. These results seem to open possibilities for high density cryogenic bipolar technology for low noise, low temperature electronics.