Bias‐Stress‐Stable Low‐Voltage Organic Field‐Effect Transistors with Ultrathin Polymer Dielectric on C Nanoparticles

Abstract

Hybrid gate dielectrics, fabricated by depositing low-k polymers on sputtered C nanoparticles (NPs), show ultrathin, robust, and pinhole-free features. The C NPs play a key role in the formation of good dielectrics. Based on the dielectrics, high-performance low-voltage organic field-effect transistors (OFETs) with excellent bias stress stability and flexible compatibility are achieved. This is a general method for various low-k polymers and applicable to both p-type and n-type OFETs. As a service to our authors and readers, this journal provides supporting information supplied by the authors. Such materials are peer reviewed and may be re-organized for online delivery, but are not copy-edited or typeset. Technical support issues arising from supporting information (other than missing files) should be addressed to the authors. Please note: The publisher is not responsible for the content or functionality of any supporting information supplied by the authors. Any queries (other than missing content) should be directed to the corresponding author for the article.