Abstract

With the rapid development of information industrialization, t he rapid development of electronic technology industry, chip co mponent packaging form in continuous improvement, electron ic chip solder joint packaging is widely used in electronic prod ucts, these electronic chips have the characteristics of thin, effic ient and high performance, users in the process of making grea t savings in human and material resources and other resources. Electronic products are used in high temperature environment for a long time, and due to the weight of the chip and other fac tors will cause its twisting deformation, but also make the weldi ng joint produce different degrees of stress strain, if the stress s train is too large will lead to the damage of the welding joint, fu rther leading to the failure of components. Liang Yongfeng obtained Sn3Ag0 through the pure torque fati gue test. The fatigue characteristic data of 5Cu and Sn0. 7Cu w ere compared with the fatigue characteristics of brazing pure torque. Liang Ying et al. studied the effect of solder spot material, sold er joint diameter, solder joint height and pad diameter on the t orsional stress strain of welding spot by establishing a microsca le chip size package solder point finite analysis model. Maia Filho et al. forecasted the torsion fatigue life of BGA sold er joints by combining torsion experiments with finite meta-analysis; John et al. studied the effect of PCB distortion deformation on BGA solder joints through a four-point distortion test. Seung et al. studied the failure mode of many different CSP sol der joints under the effect of distorted load using the cycle dist ortion test. Quayle Chen et al. used a distortion method to study the distortion performance of electronic products such as flexible printe d circuit boards and Super Twisted Nematic: STN LCD displa ys to arrive at the main factors affecting their reliability. The chip size package solder joint finite factor analysis model i s established and its high temperature torsional stress strain si mulation and orthosectance design analysis are made. Through simulation analysis, it is found that the stress is mainly distrib uted at the edge of the region and on the upper side of the solde r joint, the middle part of the welding spot stress is small and t he edge stress, the stress gradually increases from the center pa rt to the edge part, and the maximum stress is greater in contac t with the PCB board position. The orthosective analysis method is used to design 9 sets of sold er joint models with different horizontal combinations, and the torsional stress is obtained in the corresponding weld point hig h temperature environment. Through the very poor analysis, it is found that the effect of the stress size of the weld point is fro m large to small: the diameter of the pad, the diameter of the s older joint, the height of the pad. The optimal weld point struct ure parameters are combined horizontally as: 0.55mm solder d iameter, 0.42mm pad diameter, and 0.50mm solder point heigh t, and the optimal solder point parameter combination is establ ished, which is verified by simulation;

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