Beta Test Analysis of WIPL-DP

Abstract

During the Beta Test (BT) phase, WIPL-D [B.M. Kolundzija et al., 2000] was parallelized for matrix fill/solution, to supplement the frequency parallelization developed in the Alpha Test (AT) phase [S. Tabet et al. April 2004]. The new WIPL-DP code was required to run on three distinct HPC platforms. The BT phase was the final testing phase of WIPL-DP5 since the IOT&E was eliminated from the requirements. WIPL-DP was successfully parallelized for frequency and matrix fill/solution. The revised code received threshold level (or better) performance rating for all critical technical parameters (CTPs) tested. The chosen test case for the BT phase was a further modification to the version used in the AT phase of the human head adjacent to a cellular phone (DEMO-531) problem. This WIPL-DP effort was funded under the common high performance computing software support initiative (CHSSI) as described in S. Tabet et al. (2004). The goal of this initiative was to provide efficient, scalable, portable software codes, algorithms, tools, models and simulations that can run on a variety of DOD high performance computing platforms that can be used by scientists and engineers to solve computing problems.