Benchmarking nanotechnology for high-performance and low power logic transistor applications

Abstract

Recently there has been tremendous progress made in the research of novel nanotechnology for future nanoelectronics applications. In particular, several novel nanoelectronic devices such as carbon-nanotube field effect transistor (FET), Si nanowire FET, and planar III-V compound semiconductor FET, all hold promise as device candidates to be integrated onto the silicon platform for enhancing circuit functionality and also for extending Moore's law. For high-performance and low-power logic transistor applications, it is important that these research devices are frequently benchmarked against the existing Si logic transistor data in order to gauge the progress of research. In this work, we compare these novel nanoelectronic devices to the state-of-the-art planar and nonplanar Si logic transistors in terms of intrinsic speed, energy-delay product, and electrostatics. The results of this benchmarking exercise indicate that while these novel nanoelectronic devices show promise and opportunities for future logic applications, their device characteristics and electrostatics still need to be improved. We believe that BENCHMARKING is a key element in accelerating the progress of nanotechnology research for logic transistor applications.