BCD Adder Designs Based on Three-Input XOR and Majority Gates

Abstract

Lots of emerging techniques can natively realize majority-of-three (MAJ) gates. Although enhanced gates such as exclusive-OR (XOR) gates can be implemented by several MAJ gates, there exists much efficient XOR design which directly derived by the physical attributes of emerging techniques. In this brief, we proposed multi-digit binary coded decimal (BCD) adder designs represented based on three-input exclusive-OR (XOR <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> ) and MAJ gates. BCD adder is widely used in financial, commercial, and industrial computing. We implemented the designs using quantum-dot cellular automata (QCA) technology. The proposed logic representations are validated using different types of binary adders as well as QCA design strategies. The introduction of XOR <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> gates is conducive to achieve compact logic representations, which positively affect both the area and delay of QCA layouts. Compared with the existing best designs, the proposed 1-digit BCD adder has 50% less area and 10% less delay, and the 8-digit BCD adder has a 3.42× improvement of area-delay product.