Abstract

In this study, we focus on the detector design for a massive multiple-input multiple-output amplify-and-forward relaying system with low-precision analog-to-digital converters (ADCs) and digital-to-analog converters (DACs). A general relaying model with direct and relay links is considered. Several studies have been performed on the basis of simple but performance-limited linear transceivers. The optimal detector for the aforementioned setting remains unknown. To bridge this gap, we develop a minimum mean squared error detector based on the framework of variational Bayes inference. The proposed detector works similarly to the iterative turbo update, and the extrinsic information of the direct and relay links are updated through maximum ratio combining. Furthermore, our algorithm uses a partially parallel update schedule that improves the convergence compared with an intuitive method that is based on a fully parallel schedule. We then present the state evolution (SE) as an analytical framework to investigate the mean squared error and symbol error rate of the detector. By specifying the dynamics of the SE, we reveal that low-precision ADCs/DACs, that is, those using 2-4-bit quantization, realize a good tradeoff between performance and cost. Moreover, low-precision ADCs/DACs provide numerous insights into the relaying system and its design, such as the quantization step size.

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