Battery-efficient task execution on portable reconfigurable computing platforms

Abstract

We present a battery-efficient task execution methodology for portable reconfigurable computing (RC) platforms. We implement a given algorithm with varying power-performance levels: we call these implementations, Cores and each core is characterized in terms of its power and performance levels. Core change and/or the frequency change are the two mechanisms used to vary the battery consumption. We consider two cases for single task execution: one increasing the performance with a battery life constraint and the other prolonging the battery' life with a performance constraint. The execution time of each task is divided into equal time intervals, called slots. A simulated annealing based algorithm is used to find the best constraint-satisfying sequence of cores offline. Our results show a 50% increase in the total work done (case 1) and 61% increase in battery life (case 2), by using this methodology when compared to a system not using it. The combined effect of both cases is applied to a multiple task execution and the results are reported.