Abstract

A 0.13 μm CMOS system on a chip (SoC) for 64 channel neuroelectrical monitoring and responsive neurostimulation is presented. The direct-coupled chopper-stabilized neural recording front end rejects up to ±50 mV input dc offset using an in-channel digitally assisted feedback loop. It yields a compact 0.018 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> integration area and 4.2 μVrms integrated input-referred noise over 1 Hz to 1 kHz frequency range. A multiplying specific absorption rate (SAR) ADC in each channel calibrates channel-to-channel gain mismatch. A multicore low-power DSP performs synchrony-based neurological event detection and triggers a subset of 64 programmable current-mode stimulators for subsequent neuromodulation. Triple-band FSK/ultra-wideband (UWB) wireless transmitters communicate to receivers located at 10 cm to 10 m distance from the SoC with data rates from 1.2 to 45 Mbps. An inductive link that operates at 1.5 MHz, provides power and is also used to communicate commands to an on-chip ASK receiver. The chip occupies 16 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> while consuming 2.17 and 5.8 mW with UWB and FSK transmitters, respectively. Efficacy of the SoC is assessed using a rat model of temporal lobe epilepsy characterized by spontaneous seizures. It exhibits an average seizure detection sensitivity and specificity of 87% and 95%, respectively, with over 78% of all seizures aborted.

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