Band gap and gate underlap engineered novel Si0.2Ge0.8/GaAs JLTFET with dual dielectric gate for improved wireless applications

Abstract

This research article introduces a dual dielectric gate, gate-drain underlaps hetero-structure Si0.2Ge0.8/GaAs charge plasma-based junctionless TFET (DDG-GUHJLTFET). In which a first-time combined approach of the band gap, gate underlap, and gate dielectric engineering is applied on a novel Si0.2Ge0.8/GaAs compound to improve the analog/RF attributes of the reported device. The use of Si0.2Ge0.8/GaAs along with dual dielectric material (HfO2 and SiO2) improves the ON-state current (ION), whereas the implementation of the gate-underlap technique suppresses the ambipolar current (IAmb). In terms of DC characteristics, the reported device provides 1370 and 1.8 × 108 times greater ION, ION/IAmb, and 10−5 times and 80.2 % lower IAmb, SS, compared to traditional Si-JLTFET, respectively. In addition, DDG-GUHJLTFET provides 809.7 times larger transconductance (gm) in comparison to the Si-JLTFET, which led to 1.5 × 103 and 6.3 × 102 times higher cut-off frequency (fT) and maximum oscillation frequency (fmax) respectively, demonstrating its suitability for use in wireless applications.