Abstract
This paper reviews several issues related to designing a well balanced 3D PC system. Where and how the 3D pipeline is partitioned between acceleration hardware and PC processor software, can dramatically effect the cost and performance of a PC 3D implementation. Selection of bus interfaces and how they are used further influences the partitioning of the pipeline between the host CPU and the 3D hardware. Memory architecture and bandwidth, as well as the 3D quality levels desired, also must be considered to optimize the design's efficiency.
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