Backside FIB Circuit Editing—A Strategy to Hit 100% Yield Success

Abstract

Abstract Designing circuit edits at the contact level offers tremendous advantages in reliability and yield success over similar edits designed in the metal stack. To that end, a full-thickness backside circuit edit strategy has been developed that eliminates part thinning and promotes the implementation of all edits at the contact level to avoid milling into the metal layers. This article describes the FIB-based circuit edit process and presents several case studies demonstrating its use on 65 nm technology devices.