Abstract
A 24 node multiprocessor computer system is currently under development at the N. C. State University. A diameter oriented ALPHA structure is used for interconnecting the computers which will operate in a MIMD mode. A communications processor is added to each node to satisfy data communications requirements in an efficient manner in a packet switched environment. A host computer will be used for program development and compilation. The software complexity will be reduced by the use of a static mapping of the partitioned computational flow diagram representing the algorithm to be executed. The long range goal of this research project is to develop a hierarchical structure with each node being replaced by a cluster of simple processors which are custom designed to implement computational primitives associated with digital signal and image processing applications.
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