Abstract
In this paper, we analyze the design features of avalanche photodiode architectures with separated absorption (InGaAs) and multiplication (InAlAs) regions. Two architectures are considered: p+–M–с–i–n+- and p+–i–с–M–n+-types implemented in InGaAs/InAlAs/InP heteroepitaxial structures (HES). Three main layers, absorbing (i), charge (c), and multiplying (M), were mandatory for each architecture. Matrices of photosensitive elements were formed using data from InGaAs/InAlAs/InP HES grown via MOS hydride epitaxy (MOSHE) method. Photocurrent multiplication factors, which varied from 1 to 18–25 in the range of reverse bias voltages of U = 8–14 V, were calculated based on the studied current–voltage characteristics of avalanche elements in the matrices.
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