Abstract
Formal description techniques (FDTs) supported by computer-aided software engineering (CASE) tools are rapidly evolving as a response to the new challenges of the telecommunications industry, especially the need to improve “time-to-market” of software products. The purpose of this chapter is to explain automatic synthesis of formal models in International Telecommunication Union (ITU)-T standard specification and description language (SDL) to speed-up the software development process. Suggested accelerated methodology requires formalization of functional scenarios using another ITU-T standard—message sequence charts (MSC)—extended with data operations. The chapter presents synthesis algorithm that provides a comparison with related work and discusses the results of a few case studies where the Moscow synthesizer tool was used with telelogic SDL tools for an accelerated MSC-based prototyping which involved incremental synthesis, validation, and simulation of the formal model.
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