Automatic sizing of CMOS-based analogue circuits using Cuckoo search algorithm

Abstract

The increasing complexity of physical models of MOSFET and process variations with downscaling of CMOS technology have made the manual design of analogue circuits challenging and time-consuming. Therefore, development of efficient automatic analogue circuit design techniques looks very attractive. In this work, the Cuckoo search (CS) algorithm has been tested for the optimum design of CMOS-based analogue circuits with high optimisation fitness. The CS algorithm has been implemented using C language and interfaced with Ng-spice circuit simulator. In this work, the CS algorithm has been used as a searching tool for transistor sizing and Ng-spice has been used as a fitness creator. Various analogue circuits like CMOS common-source amplifier, CMOS cascode amplifier and CMOS differential amplifier using a current mirror load have been optimised using this automatic optimisation tool with BSIM 3v3 MOSFET models using 180 nm CMOS technology. This technique gives more accurate results and consumes less time as compared to manual circuit design.