Automatic layout integration of bulk built-in current sensors for detection of soft errors

Abstract

Soft error resilience is of rising importance for the design of integrated circuits realized in CMOS nanometer technologies. Therefore, Bulk Built-In Current Sensors (BBICS) have been proposed as a fast and efficient technique for detecting transient faults that might lead to soft errors. An important requirement for application of these sensors in common designs is the automatic integration. The aim of this work is to present a methodology for automatic insertion of BBICS in common standard cell designs. Further, two different placement strategies are introduced and compared. Experiments demonstrate the feasibility of the approach and indicate requirements for future BBICS developments in order to reduce area offset.