Automatic Josephson-transmission-line routing for single-flux-quantum cell-based logic circuits

Abstract

In single-flux-quantum (SFQ) circuits, the delay produced by the Josephson transmission line (JTL) is comparable with or larger than the one produced by the logic cells. Therefore, it is difficult to find the routes that satisfy the timing constraints in a large circuit manually. To overcome this obstacle, we propose a two-step automatic JTL routing technology that performs coarse and fine timing adjustments. First, an automatic router draws dummy wires within coarse timing constraints, and then the dummy wires are replaced with JTL cells. Fine timing adjustments are done in the latter step. Some JTL cells in clock and data paths are replaced with faster JTL cells so that clock signals always arrive earlier than data signals at clocked-gates. Two example circuits were designed using the automatic JTL routing technology. One is composed of nearly 600 Josephson junctions. It was experimentally tested up to 35 GHz with on-chip test components. The other is composed of about 4000 Josephson junctions. After the fine timing adjustment, logic simulation showed that it can operate at 20 GHz. We also experimentally confirmed its correct operations at low speed.