Automatic generation of reprogrammable microcoded controllers within a high-level synthesis environment

Abstract

Existing techniques in high-level synthesis mostly assume a simple controller model in the form of a single FSM. In reality more complex controller architectures are often used. On the other hand, in the case of programmable processors the controller architecture is largely defined by the available control-flow instructions in the instruction set. With the wider acceptance of behavioural synthesis, the application of these methods for the design of programmable controllers is of fundamental importance in embedded system technology. An important extension of an existing architectural synthesis system targeting the generation of reprogrammable microcoded controllers is described. The designer can then generate both styles of architecture, hardwired and programmable, using the same synthesis system and can quickly evaluate the trade-offs of hardware decisions.