Abstract

SummaryOperational amplifier (Op Amp) is a special class of analog integrated circuits. Multiple‐stage Op Amp design is of particular interest recently. However, analysis of this class of circuits has to be done manually and requires advanced skills. Automatic analysis of this class of circuits is studied in this paper, which takes a novel approach by circuit recognition and symbolic generation. Circuit recognition is deterministic, implemented by deterministic circuit partitioning and functional block extraction methods. Symbolic analysis of extracted circuit blocks can subsequently be performed with greatly reduced complexity while generated models and equations bear more useful information for circuit design. Symbolic results so generated can be applied in design space exploration, including tasks like finding the limitation in circuit topology, conducting initial sizing, and determining performance tradeoffs. This paper proposes the key algorithms for realizing the recognition of a few well‐known functional blocks frequently used in CMOS Op Amp circuits and further explores the possibility of using the recognized circuit cells in combination with the gm/ID method for circuit sizing. Preliminary tests show that this approach is a potential candidate for locating the performance boundaries of multiple‐stage Op Amps.

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