Abstract

Control and Data Flow Graph (CDFG) is a universal description of program behavior, which is widely used in the co-design of software and hardware. The derivation of CDFG has been done mostly by manually or automatically analyzing corresponding source code, which makes this process time-consuming, error-prone and incomplete. In this paper, we proposed an automated design flow based on runtime instrumentation to generate Enhanced CDFG (ECDFG) with additional runtime information. Though the approach of runtime instrumentation is widely used in software debugging to analyze the program with the accurate runtime information, it is rarely used in software and hardware co-design due to the huge trace data and processing overhead. To overcome the bottle neck of the runtime instrumentation approach, Parallel Background Event Logger is proposed to compress and save the huge amount of trace data. Hierarchical loop structures are detected by intersecting reachable set and backward reachable set. Precise data dependency information is deducted by an address based analytical method named Shower Line Algorithm. With these algorithms and techniques, a set of automatic design tools are implemented to collect runtime events, identify nested and implicit loops and deduct data dependance between modules. Exemplar results demonstrated that Enhanced CDFGs for various programs can be generated correctly with acceptable overhead.

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