Abstract
A programmed algorithm is presented for the synthesis and optimisation of networks implemented with multiplexer universal logic modules. The algorithm attempts level by level optimisation selecting the control variables that result in minimum number of continuing branches. Cascaded networks, if realisable, are always found and given preference over tree networks, though mixtures of cascade and tree configurations are permitted. The algorithm is programmed in Fortran and tested for single and double control variable modules. In theory, the program can be used for any number of variables for completely and incompletely specified functions.
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