Abstract

No available method can automatically verify the correctness of the wire bonding positions on a multi-layered wire IC. This paper presents a novel method that integrates image processing and wire bonding simulation techniques. The proposed method first takes the IC leadframe image and calculates the lead information before actual wire bonding begins. The wire bonding position information is then generated to simulate the actual wire bonding process. The generated pseudo bonding information is then compared with that from a referential machine. This approach can check the wire bonding position correctness before any actual wire bonding is executed. This approach can fully solve the mal-detection and lost detection problems that may occur in other available methods. The experimental results show that the proposed bonding position check (BPC) method is robust and fast enough for applied multi-layered wire IC inspection synchronously with the wire bonding process.

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