Abstract

The physical vapor transport (PVT) crystal growth process of 4H-SiC wafers is typically accompanied by the occurrence of a large variety of defect types such as screw or edge dislocations, and basal plane dislocations. In particular, screw dislocations may have a strong negative influence on the performance of electronic devices due to the large, distorted or even hollow core of such dislocations. Therefore, analyzing and understanding these types of defects is crucial also for the production of high-quality semiconductor materials. This work uses automated image analysis to provide dislocation information for computing the stresses and strain energy of the wafer. Together with using a genetic algorithm this allows us to predict the dislocation positions, the Burgers vector magnitudes, and the most likely configuration of Burgers vector signs for the dislocations in the wafer.Graphical abstract

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