At-speed Test of High-Speed DUT Using Built-Off Test Interface

Abstract

This paper presents an efficient test framework to extend a use of low-cost ATE (Automatic Test Equipment) to at-speed test of high-speed DUT (Device Under Test). To bridge the speed gap between the ATE and the DUT, an off-chip test interface circuit, called Built-off Test Interface (BOTI), has been developed. Unlike the previous methods which use on-chip or off-chip self-test circuits, in our method, the ATE plays main role in testing high-speed DUTs by actively controlling the BOTI operation, and monitoring the overall test procedure. This makes the presented method flexible to be applied to various test applications without compromising the test coverage. Also, since the BOTI is implemented off-chip, it does not require hardware modifications of the ATE or the DUT except the DUT load board to accommodate the BOTI module. To maintain reliable off-chip signal communication between the BOTI and the DUT, the BOTI measures off-chip channel skew and compensates the measured skew when communicating signals with the DUT. Currently, the BOTI is configured to do the at-speed test of high-speed memory. The measurement results are presented to validate the functionality of the BOTI, and the effectiveness of the presented test framework.