Abstract
HDL-A is an analog version of the Hardware Description Language which is suitable for structural and behavioral descriptions and simulations of digital, analog, and mixed-signal circuits and systems. This paper presents an automatic test program generator (ATPRG) for fault diagnosis of analog/mixed-signal integrated circuits. The ATPRG is developed under the Mentor Graphics Design system environment, where the units under test (UUT's) are modeled in HDL-A and simulated by Accusim, and AMPLE (Advanced Multi-Purpose Language) in Mentor Graphics Design system environment is used to define and execute the generation process automatically. To increase the reliability and quality, the generated test programs will be verified and validated. A verification process checks if the test programs are generated correctly and if the generated test programs can effectively locate fault(s). The test programs are validated by emulating the UUT's. The actual test can be run in a fully automatic mode, or interactively.
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